Date of Award
2016
Publisher
North Dakota State University
Document Type
Thesis
Degree Awarded
Master of Science (MS)
Program
Electrical and Computer Engineering
Department
Electrical and Computer Engineering
College
Engineering
Faculty Advisor
Srinivasan, Sudarshan
Description
This thesis presents Algorithmic State Machine (ASM) designs that follow the One Cycle Demand Driven Convention (OCDDC) of three cryptographic protocols: Secure Distributed Multiplication (SDM), Pi Secure Distributed Multiplication (PiSDM, or secure distributed multiplication of a sequence), and Secure Comparison (SC), all of which achieve maximum throughput of 1/32, 1/(32(l - 1)), and 1/(32(l - 1)), respectively, for l-bit numbers. In addition, these protocols where implemented in VHDL and tested using ModelSim-Altera, verifying their correct functionality. Noting that the difference between a scheme and a protocol is that protocols involve message exchanging between two or more parties, to the author's knowledge, these hardware designs are the first ever implementations of any kind of cryptographic protocol, and because of that reason, a general method is proposed to implement protocols in hardware. The SC protocol implementation is also shown to have a 300,000+ speed up over its Python implementation counterpart.
Recommended Citation
Zamora Garcia, Gerardo Alejandro, "Hardware Design for Cryptographic Protocols: An Algorithmic State Machine Design Approach" (2016). Electrical and Computer Engineering. 69.
https://digitalcommons.ndsu.edu/elec-comp-eng/69
Rights
NDSU Policy 190.6.2
Rights Link
https://www.ndsu.edu/fileadmin/policy/190.pdf
Handle Identifier
https://hdl.handle.net/10365/28221