Date of Award
2018
Publisher
North Dakota State University
Document Type
Thesis
Degree Awarded
Master of Science (MS)
Program
Electrical and Computer Engineering
Department
Electrical and Computer Engineering
College
Engineering
Faculty Advisor
Smith, Scott C.
Description
Recent work in motor controls has been utilizing the Field Programmable Gate Array (FPGA) instead of using the more standard microprocessors or digital signal processors. FPGAs have the advantage of flexibility and parallelization, allowing the platform to be used for multiple things. One aspect of the FPGA that has not been utilized in motor controls is Dynamic Partial Reconfiguration (DPR), which allows part of the FPGA to be reconfigured without disabling it. In this thesis, two controllers, field-oriented control and voltage-by-frequency control, are implemented on an FPGA using DPR. Only one of the controllers is actually implemented on the FPGA at a time. This system trades FPGA area for memory requirements. This configuration was simulated and implemented in a physical test bench, showing that the transition between controllers at three different speeds is stable, indicating this is a potential direction for motor controls.
Recommended Citation
Rogers, Paul Leeds, "Dynamic Partial Reconfiguration as an Approach to Motor Control Design" (2018). Electrical and Computer Engineering. 57.
https://digitalcommons.ndsu.edu/elec-comp-eng/57
Rights
NDSU Policy 190.6.2
Rights Link
https://www.ndsu.edu/fileadmin/policy/190.pdf
Author ORCID Identifier
0000-0002-6808-3653
Handle Identifier
https://hdl.handle.net/10365/28731